Field of Invention
The present disclosure relates to a memory system. More particularly, the present disclosure relates to a non-volatile memory device adopting a differential structure and an operating method thereof.
Description of Related Art
With the rapid advance of digital technology and the release of various kinds of electronics, performance requirements of memory units (such as high density and high speed storage) become more and more stringent. The memory unit is commonly integrated with an integrated chip system into a single chip by single chip technology to decrease size of chip systems according to the current trend of manufacturing the integrated chip system. Accordingly, the memory unit is correspondingly adopted a single poly-silicon gate to achieve the requirement of decreasing the size of chip systems. However, with the size decrement of chip systems, thickness of a gate oxide layer of the memory unit is correspondingly decreases. When the thickness of the gate oxide layer is excessively small, the current leakage may be incurred in the memory unit.
Traditionally, for obtaining a storage state of the memory unit, a comparator is used for comparing an electric potential of the memory unit with a reference electric potential, so as to determine a storage state of the memory unit. However, when the size decrement of chip systems results in increment of the current leakage, the determination of the storage state of the memory unit made by the above-mentioned comparing manner may be incorrect. Furthermore, additional peripheral circuits are commonly necessary to generate an accurate reference electric potential, but this also dramatically increases area of chip systems and cost of manufacturing chip systems.
Accordingly, a significant challenge is related to ways in which to accurately determine storage states of memory units while at the same time decreasing cost of manufacturing the memory units associated with designing the memory units.